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File: //lib/modules/5.4.0-216-generic/kernel/drivers/mtd/nand/raw/nandsim.ko
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A��$����t,��t��t/H��A�����A��$�A��$��"��tADŽ$��H�"��tADŽ$��*�"��tADŽ$��ADŽ$�A��$ADŽ$x�A��$p���@�=A��$�H�I��$hu��ADŽ$dA��$�H�IDŽ$�H����H�E�H�}�1�H�u؊�I�ŀ�0t��uH��A������H�}ػ�?:uH��1�H�u�H�}����H�E؀8,uH��H�E�H�=� ��
�H����H�D�h�XH�H�BH�H�@H�E؀8�J���H�H����H�E�H�}�1�H�u؊�I�ŀ�0t��uH��A�����H�}ػ�?:uH��1�H�u�H�}����H�E؀8,uH��H�E�H�=� ��
�H����H�D�h�XH�H�BH�H�@H�E؀8�J���H�H����H�E�H�}�1�H�u؊�I�ŀ�0t��uH��A�����8H�}ػ�?:uH��1�H�u�H�}����H�E؀8,uH��H�E�H�=� ��
�H��uH��A�����H�D�h�XH�H�BH�H�@H�E؀8�7���I��$8H��H��H���1ҾL��IDŽ$XI��$H�A�Ņ�tH����JH�5�
�V����H��H��H��H��H9�tH��A������H�FA��$��A��$���A��$�H��H��A��$�H�ƒ��V�A��$�A��$�H���A��$��NH�F1�H����H�<��H�H��tH�=���A�Ņ��0�H��A����L���A�Ņ��H�L�-H��thH�E�H�}�1�H�u؊���0t��uH��A�������A��$�L��H�����u�H�E؀8,uH��H�E�H�E؀8u�E��$`H�=1�1�I��$`�A�Ņ�ubH�H���H��t	H���vH����~I�L��H���H��tH=�vVH��A���I��$�1��L���L���I��`H��0�H��u�L����H�E�eH3%(t�ZD��Y[A\A]]�UH��AUL�-ATSM�� 1�I��$��L���L���I��`H��0�H��u�L����[A\A]]�3[nandsim] error: get_state_by_command: unknown command, BUG
3[nandsim] error: get_state_name: unknown state, BUG
3[nandsim] error: BCH not available on small page devices
3[nandsim] error: Invalid BCH value %u
6[nandsim] Using %u-bit/%u bytes BCH ECC
[nandsim] debug: switch_to_ready_state: switch to %s state
Total numbers of erases:  %lu
Average number of erases: %lu
Maximum number of erases: %lu
Minimum number of erases: %lu
Number of ebs with erase counts from %lu to %lu : %lu
4[nandsim] warning: simulating read error in page %u
4[nandsim] warning: read_page: flipping bit %d in page %d reading from %d ecc: corrected=%u failed=%u
4[nandsim] warning: do_state_action: wrong page number (%#x)
3[nandsim] error: do_state_action: column number is too large
[nandsim] debug: read_page: page %d not written
[nandsim] debug: read_page: page %d written, reading from %d
3[nandsim] error: read_page: read error for page %d ret %ld
[nandsim] debug: read_page: page %d not allocated
[nandsim] debug: read_page: page %d allocated, reading from %d
[nandsim] debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d
[nandsim] log: read page %d (second half)
[nandsim] log: read OOB of page %d
3[nandsim] error: do_state_action: device is write-protected, ignore sector erase
3[nandsim] error: do_state_action: wrong sector address (%#x)
[nandsim] debug: do_state_action: erase sector at address %#x, off = %d
[nandsim] log: erase sector %u
[nandsim] debug: erase_sector: freeing page %d
3[nandsim] error: Erase counter total overflow
3[nandsim] error: Erase counter overflow for erase block %u
4[nandsim] warning: simulating erase failure in erase block %u
4[nandsim] warning: do_state_action: device is write-protected, programm
3[nandsim] error: do_state_action: too few bytes were input (%d instead of %d)
[nandsim] debug: prog_page: writing page %d
3[nandsim] error: prog_page: read error for page %d ret %ld
3[nandsim] error: prog_page: write error for page %d ret %ld
[nandsim] debug: prog_page: allocating page %d
3[nandsim] error: prog_page: error allocating memory for page %d
[nandsim] debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d
[nandsim] log: programm page %d
4[nandsim] warning: simulating write failure in page %u
[nandsim] debug: do_state_action: set internal offset to 0
3[nandsim] error: do_state_action: BUG! can't skip half of page for non-512byte page size 8x chips
[nandsim] debug: do_state_action: set internal offset to %d
[nandsim] debug: do_state_action: BUG! unknown action
3[nandsim] error: init_nandsim: nandsim is already initialized
3[nandsim] error: init_nandsim: unknown page size %u
3[nandsim] error: too many partitions.
3[nandsim] error: bad partition size.
3[nandsim] error: unable to allocate memory.
4[nandsim] warning: 16-bit flashes support wasn't tested
flash size with OOB: %llu KiB
3[nandsim] error: alloc_device: cache file not readable
3[nandsim] error: alloc_device: cache file not writeable
3[nandsim] error: alloc_device: unable to allocate pages written array
3[nandsim] error: alloc_device: unable to allocate file buf
3[nandsim] error: alloc_device: unable to allocate page array
3[nandsim] error: cache_create: unable to create kmem_cache
3[nandsim] error: init_nandsim: unable to allocate %u bytes for the internal buffer
[nandsim] debug: find_operation: operation found, index: %d, state: %s, nxstate %s
[nandsim] debug: find_operation: no operation found, try again with state %s
[nandsim] debug: find_operation: no operations found
[nandsim] debug: find_operation: BUG, operation must be known if address is input
[nandsim] debug: find_operation: there is still ambiguity
[nandsim] debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s
[nandsim] debug: switch_state: operation is unknown, try to find it
[nandsim] debug: switch_state: double the column number for 16x device
4[nandsim] warning: switch_state: not all bytes were processed, %d left
[nandsim] debug: switch_state: operation complete, switch to STATE_READY state
[nandsim] debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s
3[nandsim] error: switch_state: BUG! unknown data state
3[nandsim] error: switch_state: BUG! unknown address state
3[nandsim] error: write_byte: chip is disabled, ignore write
3[nandsim] error: write_byte: ALE and CLE pins are high simultaneously, ignore write
3[nandsim] error: write_byte: unknown command %#x
4[nandsim] warning: write_byte: command (%#x) wasn't expected, expected state is %s, ignore previous states
[nandsim] debug: command byte corresponding to %s state accepted
[nandsim] debug: write_byte: operation isn't known yet, identify it
drivers/mtd/nand/raw/nandsim.c3[nandsim] error: write_byte: address (%#x) isn't expected, expected state is %s, switch to STATE_READY
3[nandsim] error: write_byte: no more address bytes expected
[nandsim] debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected)
[nandsim] debug: address (%#x, %#x) is accepted
3[nandsim] error: write_byte: data input (%#x) isn't expected, state is %s, switch to %s
4[nandsim] warning: write_byte: %u input bytes has already been accepted, ignore write
3[nandsim] error: read_buf: chip is disabled
3[nandsim] error: read_buf: ALE or CLE pin is high
4[nandsim] warning: read_buf: unexpected data output cycle, current state is %s
3[nandsim] error: read_byte: chip is disabled, return %#x
3[nandsim] error: read_byte: ALE or CLE pin is high, return %#x
4[nandsim] warning: read_byte: unexpected data output cycle, state is %s return %#x
[nandsim] debug: read_byte: return %#x status
4[nandsim] warning: read_byte: no more data to output, return %#x
[nandsim] debug: read_byte: read ID byte %d, total = %d
[nandsim] debug: read_byte: all bytes were read
3[nandsim] error: read_buf: too many bytes to read
3[nandsim] error: write_buf: data input isn't expected, state is %s, switch to STATE_READY
3[nandsim] error: write_buf: too many input bytes
[nandsim] debug: write_buf: %d bytes were written
3[nandsim] error: wrong bus width (%d), use only 8 or 16
3[nandsim] error: unable to allocate core structures.
3[nandsim] error: bbt has to be 0..2
3[nandsim] error: invalid weakblocks.
3[nandsim] error: invalid weakpages.
3[nandsim] error: invalid gravepagess.
3[nandsim] error: Could not scan NAND Simulator device
3[nandsim] error: overridesize is too big
3[nandsim] error: Too many erase blocks for wear reporting
3[nandsim] error: invalid badblocks.
4[nandsim] warning: CONFIG_MTD_PARTITIONED_MASTER must be enabled to expose debugfs stuff
3[nandsim] error: cannot create "nandsim_wear_report" debugfs entry
 debug: write_buf: %d bytes were written
 debug: address (%#x, %#x) is accepted
 debug: write_byte: address byte %#x was accepted (%d bytes input, %d expected)
 debug: write_byte: operation isn't known yet, identify it
 debug: command byte corresponding to %s state accepted
 debug: read_byte: all bytes were read
 debug: read_byte: read ID byte %d, total = %d
 debug: read_byte: return %#x status
 debug: switch_state: the next state is data I/O, switch, state: %s, nxstate: %s
 debug: switch_state: operation complete, switch to STATE_READY state
 debug: switch_state: double the column number for 16x device
 debug: switch_state: operation is unknown, try to find it
 debug: switch_state: operation is known, switch to the next state, state: %s, nxstate: %s
 debug: do_state_action: BUG! unknown action
 debug: do_state_action: set internal offset to %d
 debug: do_state_action: set internal offset to 0
 debug: do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d
 debug: do_state_action: erase sector at address %#x, off = %d
 log: read page %d (second half)
 debug: do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d
 debug: prog_page: allocating page %d
 debug: prog_page: writing page %d
 debug: erase_sector: freeing page %d
 debug: read_page: page %d allocated, reading from %d
 debug: read_page: page %d not allocated
 debug: read_page: page %d written, reading from %d
 debug: read_page: page %d not written
 debug: find_operation: there is still ambiguity
 debug: find_operation: BUG, operation must be known if address is input
 debug: find_operation: no operations found
 debug: find_operation: no operation found, try again with state %s
 debug: find_operation: operation found, index: %d, state: %s, nxstate %s
 debug: switch_to_ready_state: switch to %s state
STATE_CMD_READOOBSTATE_CMD_READSTARTSTATE_CMD_RESETSTATE_CMD_READ0STATE_CMD_SEQINSTATE_CMD_ERASE1STATE_CMD_PAGEPROGSTATE_CMD_STATUSSTATE_CMD_READIDSTATE_READYSTATE_ADDR_PAGESTATE_CMD_RNDOUTSTATE_ADDR_ZEROSTATE_CMD_RNDOUTSTARTSTATE_CMD_ERASE2STATE_ADDR_SECSTATE_DATAOUT_IDSTATE_DATAINSTATE_ADDR_COLUMNSTATE_DATAOUTSTATE_CMD_READ1STATE_DATAOUT_STATUSSTATE_UNKNOWNNumber of erase blocks:   %u
[nandsim] log: read page %d
NAND simulator partition %dflash size: %llu MiB
page size: %u bytes
OOB area size: %u bytes
sector size: %u KiB
pages number: %u
pages per sector: %u
bus width: %u
bits in sector size: %u
bits in page size: %u
bits in OOB size: %u
page address bytes: %u
sector address bytes: %u
options: %#x
nandsim[nandsim] log: reset chip
&nfc->locknandsim_wear_report log: reset chip
 log: programm page %d
 log: erase sector %u
 log: read OOB of page %d
 log: read page %d
ns_nand_write_bufns_nand_read_byteswitch_to_ready_stateswitch_stateprog_pageerase_sectorread_pagedo_state_actionfind_operationns_nand_write_bytebchbbtcache_fileoverridesizegravepagesbitflipsweakpagesweakblocksbadblocksparts dbglogdo_delaysbus_widthinput_cycleoutput_cycleerase_delayprogramm_delayaccess_delayfourth_id_bytethird_id_bytesecond_id_bytefirst_id_byteid_bytesdescription=The NAND flash simulatorauthor=Artem B. Bityuckiylicense=GPLparm=bch:Enable BCH ecc and set how many bits should be correctable in 512-byte blocksparm=bbt:0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data areaparm=cache_file:File to use to cache nand pages instead of memoryparm=overridesize:Specifies the NAND Flash size overriding the ID bytes. The size is specified in erase blocks and as the exponent of a power of two e.g. 5 means a size of 32 erase blocksparm=gravepages:Pages that lose data [: maximum reads (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be read only twice before failingparm=bitflips:Maximum number of random bit flips per page (zero by default)parm=weakpages:Weak pages [: maximum writes (defaults to 3)] separated by commas e.g. 1401:2 means page 1401 can be written only twice before failingparm=weakblocks:Weak erase blocks [: remaining erase cycles (defaults to 3)] separated by commas e.g. 113:2 means eb 113 can be erased only twice before failingparm=badblocks:Erase blocks that are initially marked bad, separated by commasparm=parts:Partition sizes (in erase blocks) separated by commasparm=dbg:Output debug information if not zeroparm=log:Perform logging if not zeroparm=do_delays:Simulate NAND delays using busy-waits if not zeroparm=bus_width:Chip's bus width (8- or 16-bit)parm=input_cycle:Word input (to flash) time (nanoseconds)parm=output_cycle:Word output (from flash) time (nanoseconds)parm=erase_delay:Sector erase delay (milliseconds)parm=programm_delay:Page programm delay (microsecondsparm=access_delay:Initial page access delay (microseconds)parm=fourth_id_byte:The fourth byte returned by NAND Flash 'read ID' command (obsolete)parm=third_id_byte:The third byte returned by NAND Flash 'read ID' command (obsolete)parm=second_id_byte:The second byte returned by NAND Flash 'read ID' command (chip ID) (obsolete)parm=first_id_byte:The first byte returned by NAND Flash 'read ID' command (manufacturer ID) (obsolete)parm=id_bytes:The ID bytes returned by NAND Flash 'read ID' commandparmtype=bch:uintparmtype=bbt:uintparmtype=cache_file:charpparmtype=overridesize:uintparmtype=gravepages:charpparmtype=bitflips:uintparmtype=weakpages:charpparmtype=weakblocks:charpparmtype=badblocks:charpparmtype=parts:array of ulongparmtype=dbg:uintparmtype=log:uintparmtype=do_delays:uintparmtype=bus_width:uintparmtype=input_cycle:uintparmtype=output_cycle:uintparmtype=erase_delay:uintparmtype=programm_delay:uintparmtype=access_delay:uintparmtype=fourth_id_byte:byteparmtype=third_id_byte:byteparmtype=second_id_byte:byteparmtype=first_id_byte:byteparmtype=id_bytes:array of bytesrcversion=818BB99526E015E0E3110A7depends=nand,mtdretpoline=Yintree=Yname=nandsimvermagic=5.4.0-216-generic SMP mod_unload modversions �������������������������p��module_layout\�param_ops_bytes	param_ops_ulong՘��param_array_ops��i�param_ops_charp眪�param_ops_uintȞPsingle_release�S�seq_read�m��seq_lseek�Y�nand_release�,�idebugfs_create_file��y[mtd_device_parse_register+Us�mtd_block_markbadC�@nand_create_bbt��6�nand_scan_with_idsQ�__mutex_initѠ"�kmem_cache_alloc_trace:zL�kmalloc_caches) simple_strtoulq��kmem_cache_create�h��vmallocI��@vzallocW�#filp_open7M8�kasprintfӱ1	kmem_cache_alloc8߬imemcpy����__const_udelayŏW�memset�k}�__udelayT�Xkernel_writem���kernel_reade�current_taskE:#�__kmallocX��prandom_u32�9��prandom_bytes
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