HEX
Server: Apache
System: Linux scp1.abinfocom.com 5.4.0-216-generic #236-Ubuntu SMP Fri Apr 11 19:53:21 UTC 2025 x86_64
User: confeduphaar (1010)
PHP: 8.1.33
Disabled: exec,passthru,shell_exec,system
Upload Files
File: //lib/modules/5.4.0-216-generic/kernel/drivers/fpga/altera-pr-ip-core.ko
ELF>x!@@! GNU{B{���:�敍\����r��Linux�UH��H��H��H��P�����tv��uf��Å�uɸÃ������1�H���H����HE΍�H��I�H���E���E���1�H��֐�L��H����UH��H��v}H�J�H��I��H��I��L�TM��A�H��L9�u�I����H��t H��t2H��t ���]��	�����D���I�B�����I�B�����B��I�%������E1�뭸���f��UH��AUI��ATI��S1��"�������CA9]���L���n�����	uѸ����[A\A]]�ff.�f��U��
H��AUI���ATSH���H��tsI��L�(E�MDH�sPH��uH�3H��L��H���H��H��t>H�Cx�[A\A]]�E��H�A��H��A��H��H��A���뜸���ff.��UH��ATL�gxDL���A\]�H��H�H��H���L���A\]���UH��H���H��@��H����B1�]ø	H��1�H���	H��I�|$H���1��I�|$H���������H��H��H�������H��H��H�������pr errorunknownbad bitscrc error%s status=%d start=%d
%s
altera_pr_ip_coreencountered error code %d (%s) in %s()
successful partial reconfiguration
timed out waiting for write to complete
%s Partial Reconfiguration flag not set
%s Partial Reconfiguration already started
drivers/fpga/altera-pr-ip-core.calt_pr_unregisteralt_pr_fpga_statealt_pr_fpga_write_initalt_pr_registerlicense=GPL v2description=Altera Partial Reconfiguration IP Coreauthor=Matthew Gerlach <matthew.gerlach@linux.intel.com>srcversion=CA741B319E9C06E205B32A7depends=fpga-mgrretpoline=Yintree=Yname=altera_pr_ip_corevermagic=5.4.0-216-generic SMP mod_unload modversions alt_pr_unregisteralt_pr_register�p��module_layout�JLdevm_fpga_mgr_create����__const_udelayU|��fpga_mgr_register3���fpga_mgr_unregisterڶV3_dev_err�-U_dev_info�m��__fentry__��"�__dynamic_dev_dbg��Ydevm_kmalloc��altera_pr_ip_coreGCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0altera-pr-ip-core.ko��
{#�0�=�U�	j�}�7������ )0@��RPSm03�88��H�`�8���4cB@.D3^B9	
���s���`I��,�������	���__UNIQUE_ID_srcversion43__UNIQUE_ID_depends42____versions__UNIQUE_ID_retpoline41__UNIQUE_ID_intree40__UNIQUE_ID_name39__UNIQUE_ID_vermagic38_note_6__ksymtab_alt_pr_register__kstrtab_alt_pr_register__ksymtab_alt_pr_unregister__kstrtab_alt_pr_unregisteralt_pr_fpga_state__func__.24761alt_pr_fpga_state.coldalt_pr_fpga_writealt_pr_fpga_write_completealt_pr_fpga_write_complete.cold__UNIQUE_ID_ddebug52.24807alt_pr_ops__func__.24808__UNIQUE_ID_ddebug53.24821__func__.24822alt_pr_fpga_write_initalt_pr_fpga_write_init.cold__func__.24770__UNIQUE_ID_license56__UNIQUE_ID_description55__UNIQUE_ID_author54devm_kmalloc__this_module__crc_alt_pr_register__dynamic_dev_dbg__fentry___dev_info_dev_errfpga_mgr_unregisterfpga_mgr_register__const_udelaydevm_fpga_mgr_create__crc_alt_pr_unregister9��������EK
T��������]g	| ��;���������	�9��������Q9��������m,w>���������D�9���������4����������?��������=��������#`5$<8E8��������a9��������x<����������;��8���������<���������9���������_��
q	q',q8(=:��������D�PPU;��������_�j@q�v;�����������@���;����������36
7
@�P� `(�������P�`o�(?�;8?@`H�P$.symtab.strtab.shstrtab.note.gnu.build-id.note.Linux.rela.text.rela.text.unlikely.rela__ksymtab_gpl.rela__kcrctab_gpl.rodata.str1.1.rodata.str1.8.rela__mcount_loc.rela.rodata.modinfo__ksymtab_strings__versions.rela__jump_table.data.rela__verbose.gnu.linkonce.this_module.bss.comment.note.GNU-stack.gnu_debuglink@$.d?��:@H0Jd�E@x�^Y@X`q$l@�0	2,Q�2���0�@��
��� �@x`����"��� �@
 �@���`
�`
p�@h�	�@#�(0�X1�A��3	6( P0��	*�H��
���0��1
0	`�He0	*�H��
1�o0�k0F0.1,0*U#Build time autogenerated kernel key�ª�C���
Ys@!0	`�He0
	*�H��
�	A
ǖ$3jpײ[|�J���o��!�aN�
����h>XI���.��א�f�mm�1�o�K�WZ�+�V�'�`~i�r�
���PӖ��$��.d��ؒ�*��ʺR� }ҺX?�7�k8NOl�?�x�!~��9��s�ߠe���_�2����k߮����NjZ@|~z�ė��՜z�����^�L`gJ3��	 ��w`�>�µ�'X�������{F�J��ê�;K�13��^�|f�/@��8�x���t8C�۾
���O���u�g�JC��(�^1�v���cی��J&�
�=�	GR�V�Wh{��s"l�9t�wT1���X��|�Z�)b�wasL0�e�!)�ͧ�K�wYM����N��i���w�v����H����+[�*��X��E���NB/�oB�@�j������*�H̍�mG��G���X��aN�[v�fiC{e�W4��S�dK�
ܱ����9��(.C�	���@�����j��~Module signature appended~